Low-power Techniques for Successive Approximation Register (SAR) Analog-to-digital Converters

Download or read book Low-power Techniques for Successive Approximation Register (SAR) Analog-to-digital Converters written by Ramgopal Sekar and published by . This book was released on 2010 with total page 160 pages. Available in PDF, EPUB and Kindle. Book excerpt: In this work, the author investigated circuit techniques to reduce the power consumption of Successive Approximation Register Analog-to-Digital Converter (SAR-ADC). The author developed four low-power SAR-ADC design techniques, which are: (1) Low-power SAR-ADC design with split voltage reference, (2) Charge recycling techniques for low-power SAR-ADC design, (3) Low-power SAR-ADC design using two-capacitor arrays, (4) Power reduction techniques by dynamically minimizing SAR-ADC conversion cycles. Matlab simulations are performed to investigate the power saving by the proposed techniques. Simulation results show that significant power reduction can be achieved by using the developed techniques. In addition, design issues such as area overhead, design complexity associated with the proposed low-power techniques are also discussed in the thesis.