Yield and Performance Enhancement Through Redundancy in VLSI and WSI Multi-Precessor Systems

Download or read book Yield and Performance Enhancement Through Redundancy in VLSI and WSI Multi-Precessor Systems written by Israel Koren and published by . This book was released on 1986 with total page 52 pages. Available in PDF, EPUB and Kindle. Book excerpt: New challenges have been brought to fault-tolerant computing and processor architecture research because of developments in IC technology. One emergent area is development of architectures, built by interconnecting a large number of processing elements on a single chip or wafer. Two important areas, related to such VLSI processor arrays, are the focus of this paper; they are fault-tolerance, and yield improvement techniques. Fault-tolerance in these VLSI processor arrays is of real practical significance; it provides for much-needed reliability improvement. Therefore, we first describe the underlying concepts of fault-tolerance at work in these multi-processor systems. These precepts are useful to then present certain techniques that will incorporate fault-tolerance integrally into the design. In the second part of the paper we discuss models that evaluate how yield enhancement and reliability improvement may be achieved by certain fault-tolerant techniques. (Author).