High-speed and Low-power Techniques for Successive-approximation-register Analog-to-digital Converters

High-speed and Low-power Techniques for Successive-approximation-register Analog-to-digital Converters
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Total Pages : 86
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ISBN-10 : OCLC:1296610199
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Book Synopsis High-speed and Low-power Techniques for Successive-approximation-register Analog-to-digital Converters by : Eric Lee Swindlehurst

Download or read book High-speed and Low-power Techniques for Successive-approximation-register Analog-to-digital Converters written by Eric Lee Swindlehurst and published by . This book was released on 2020 with total page 86 pages. Available in PDF, EPUB and Kindle. Book excerpt: Broadband wireless communication systems demand power-efficient analog-to-digital converters (ADCs) in the GHz and medium resolution regime. While high-speed architectures such as the flash and pipelined ADCs are capable of GHz operations, their high-power consumption reduces their attractiveness for mobile applications. On the other hand, the successive-approximation-register (SAR) ADC has an excellent power efficiency, but its slow speed has traditionally limited it to MHz applications. This dissertation puts forth several novel techniques to significantly increase the speed and power efficiency of the SAR architecture and demonstrates them in a low-power 10-GHz SAR ADC suitable for broadband wireless communications.


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